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STV6410A
AUDIO/VIDEO SWITCH MATRIX
. . . . . . . . . . . . . . . .
I2C BUS CONTROL STANDBY MODE
VIDEO SECTION 5 CVBS INPUTS, 4 CVBS OUTPUTS (ONE WITH SELECTABLE CHROMA TRAP FILTER) 5 Y/C INPUTS, 3 Y/C OUTPUTS 6dB GAIN ON ALL CVBS/Y AND C OUTPUTS 1 Y/C ADDER 2 RGB/FB INPUTS, 1 RGB/FB OUTPUT WITH 6dB ADJUSTABLE GAIN VIDEO MUTING ON ALL THE OUTPUTS 3 SLOW BLANKING INPUTS/OUTPUTS SYNC BOTTOM CLAMP ON ALL CVBS/Y AND RGB INPUTS, AVERAGE ON C INPUTS BANDWIDTH : 15MHz CROSSTALK : 60dB Typ. AUDIO SECTION 5 STEREO INPUTS, 4 STEREO OUTPUTS (TWO WITH LEVEL ADJUSTMENT) MONO SOUND OUTPUT STEREO TO MONO CAPABILITY ON ALL SCARTS AUDIO MUTING ON ALL THE OUTPUTS
TQFP64 (10 x 10 x 1.4mm) (Full Plastic Quad Flat Pack) ORDER CODE : STV6410AD
DESCRIPTION The STV6410A is a highly integrated I2C bus-controlled audio and video switch matrix, optimized for use in digital set-top box applications. It provides all the audio and video routings required in a full three scart set-top box design. It is also fully pin compatible with STV6411A, the two scart version.
December 1998 1/22
STV6410A
PIN CONNECTIONS
YCVBSOUT_AUX YCVBSOUT_VCR YCVBSOUT_TV
COUT_VCR
COUT_AUX
ROUT_AUX
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
RCOUT_TV
LOUT_AUX
VOUT_RF
AOUT_RF
GNDV2
VCC2
LOUT_TV
FILTER
GNDV3
VCC3
FBOUT_TV FBIN_AUX FBIN_ENC ADD SCL SDA VCC12 YCVBSIN_AUX SLB_TV YIN_AUX SLB_VCR RCIN_AUX GNDV1 GIN_AUX SLB_AUX BIN_AUX
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
ROUT_TV GOUT_TV LOUT_VCR BOUT_TV ROUT_VCR LOUT_CINCH ROUT_CINCH GNDA RIN_TV VCCA CIN_TV LIN_TV YCVBSIN_TV VREF YCVBSIN_VCR LIN_VCR
YCVBSIN_ENC
RCIN_ENC
CVBSIN_STB
GIN_ENC
CIN_ENC
RIN_ENC
LIN_ENC
LIN_AUX
RIN_VCR
CIN_VCR
RIN_STB
LIN_STB
RIN_AUX
YIN_ENC
BIN_ENC
VCC1
PIN LIST
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2/22 Symbol RCOUT_TV LOUT_TV YCVBSOUT_TV ROUT_AUX COUT_VCR LOUT_AUX YCVBSOUT_VCR AOUT_RF VOUT_RF GNDV3 FILTER VCCV3 COUT_AUX GNDV2 YCVBSOUT_AUX Description Red/chroma Output, to TV Scart Audio Left Output, to TV Scart Y/CVBS Output, to TV scart Audio Right Output, to AUX Scart Chroma Output, to VCR Scart Audio Left Output, to AUX Scart Y/CVBS Output, to VCR Scart Audio (L+R) Output to RF Modulator Video (CVBS) Output to RF Modulator Video Switches Ground 3 Chroma Trap Filter Video Switches Supply 3 (8V) Chroma Output, to AUX Scart Video Switches Ground 2 Y/CVBS Output, to AUX Scart
6410A-01.TBL
6410A-01.EPS
STV6410A
PIN LIST (continued)
Pin Number 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Symbol VCCV2 FBOUT_TV FBIN_AUX FBIN_ENC ADD SCL SDA VCC12 YCVBSIN_AUX SLB_TV YIN_AUX SLB_VCR RCIN_AUX GNDV1 GIN_AUX SLB_AUX BIN_AUX VCCV1 CVBSIN_STB LIN_AUX YCVBSIN_ENC RIN_AUX YIN_ENC RIN_STB CIN_ENC LIN_STB RCIN_ENC RIN_ENC GIN_ENC LIN_ENC BIN_ENC RIN_VCR CIN_VCR LIN_VCR YCVBSIN_VCR VREF YCVBSIN_TV LIN_TV CIN_TV VCCA RIN_TV GNDA ROUT_CINCH LOUT_CINCH ROUT_VCR BOUT_TV LOUT_VCR GOUT_TV ROUT_TV Description Video Switches Supply 2 (8V) Fast Blanking Output, to TV Scart Fast Blanking Input, from AUX Scart Fast Blanking Input, from Encoder I2C Bus IC Address Programmation I2C Bus Clock I2C Bus Data Slow Blanking Power Supply (12V) Y/CVBS Input from AUX Scart Slow Blanking Input/Ouput from TV Y Input, from AUX Scart Slow Blanking Input/Ouput from VCR Red/Chroma Input, from AUX Scart Video Switches Ground 1 Green Input, from AUX Scart Slow Blanking Input/Ouput from AUX Blue Input, from AUX Scart Video Switches Supply 1 (8V) CVBS Input from STB Audio Left Input, from AUX Scart Y/CVBS Input from Encoder Audio Right Input, from AUX Scart Y Input, from Encoder Audio Right Input, from STB Chroma Input, from Encoder Audio Left Input, from STB Red/Chroma Input, from Encoder Audio Right Input, from Encoder Green Input, from Encoder Audio Left Input, from Encoder Blue Input, from Encoder Audio Right Input, from VCR Scart Chroma Input, from VCR Scart Audio Left Input, from VCR Y/CVBS Input from VCR Scart Voltage Reference Decoupling Y/CVBS Input, from TV Scart Audio Left Input, from TV Scart Chroma Input, from TV Scart Audio Switches Supply (8V) Audio right input, from TV Scart Audio Switches Ground Audio Right Output, to CINCH Audio Left Output, to CINCH Audio Right Output, to VCR sCart Blue Output, to TV Scart Audio Left Output, to VCR Scart Green Output, to TV Scart Audio Right Output, to TV Scart 3/22
6410A-01.TBL
STV6410A
BLOCK DIAGRAM
FB SWITCH
STV6410A
17 FBOUT_TV
FBIN_ENC 19 FBIN_AUX 18
4V 0V
RGB SWITCH
BIN_ENC 46 BIN_AUX 32 GIN_ENC 44 GIN_AUX 30 RCIN_ENC 42 RCIN_AUX 28 CIN_ENC 40 CIN_VCR 48 YCVBSIN_AUX 24 CIN_TV 54 YCVBSIN_ENC 36 YCVBSIN_VCR 50 CVBSIN_STB 34
B_ENC B_AUX G_ENC G_AUX R/C_ENC R/C_AUX MUTE C SWITCH R/C_AUX R/C_ENC C_ENC C_VCR MUTE Y/CVBS SWITCH CVBS/Y_AUX CVBS/Y_ENC CVBS/Y_VCR CVBS_STB Y_AUX Y_ENC MUTE C SWITCH R/C_ENC C_ENC C_VCR C_TV MUTE Y/CVBS SWITCH CVBS/Y_ENC CVBS/Y_VCR CVBS_STB CVBS/Y_TV Y_ENC MUTE C SWITCH R/C_ENC C_ENC C_TV C_AUX MUTE Y/CVBS SWITCH CVBS_STB CVBS/Y_ENC CVBS/Y_AUX CVBS/Y_TV Y_AUX Y_ENC MUTE CINCH SWITCH L_ENC L_STB L_TV L_VCR L_AUX R_ENC R_STB R_TV R_VCR R_AUX MUTE AUX SWITCH
6dB
61 BOUT_TV 63 GOUT_TV 1 RCOUT_TV
6dB
6dB
6dB
9 TRAP
VOUT_RF
11 FILTER 3 YCVBS/OUT_TV
6dB
6dB
13 COUT_AUX
6dB
15 YCVBSOUT_AUX
6dB
5
COUT_VCR
YCVBSIN_TV 52 YIN_AUX 26 YIN_ENC 38 LIN_ENC 45 LIN_STB 41 LIN_TV 53 LIN_VCR 49 LIN_AUX 35 RIN_ENC 43 RIN_STB 39
7
6dB
YCVBSOUT_VCR
25 SLB_TV SLOW BLANK, I/O MONITOR
-14dB
27 SLB_VCR 31 SLB_AUX 59 LOUT_CINCH
0/6dB
-14dB
0/6dB
58 ROUT_CINCH
L_ENC L_STB L_TV L_VCR R_VCR R_TV R_STB R_ENC MUTE VCR SWITCH
6 STEREO/ MONO 4
LOUT_AUX ROUT_AUX
RIN_TV 56 RIN_VCR 47 RIN_AUX 37
I2C BUS DECODER
L_ENC L_STB L_TV L_AUX R_ENC R_STB R_AUX R_TV MUTE TV SWITCH L_ENC L_STB L_VCR L_AUX R_AUX R_VCR R_STB R_ENC MUTE
62 LOUT_VCR STEREO/ MONO 60 ROUT_VCR 8
-14dB
AOUT_RF LOUT_TV
6410A-02.EPS
SCL 21 SDA 22
0/6dB
STEREO/ MONO
-14dB
2
0/6dB
64 ROUT_TV
4/22
STV6410A
ABSOLUTE MAXIMUM RATINGS
Symbol AVCC,VVCC VI VCC12 VSLBK VESD Toper Tstg Parameter Supply voltage for Audio and Video Sections Voltage at pin i to GND. Except SDA, SCL at 5.5V max Supply Voltage for Slow Blanking Sections Voltage at slow blanking pins to GND Maximum ESD Voltage allowed (100pF capacitor discharged through 1.5k serial resistor - Human Body Model) Operating Ambient Temperature Storage Temperature Value 10 0, VCC 13.2 0, VCC12 4 0, +70 -20, +150 Unit V V V V kV
o o
6410A-02.TBL 6410A-04.TBL 6410A-03.TBL
C C
THERMAL DATA
Symbol Rth (j-a) Parameter Junction-ambient Thermal Resistance Max. Value 68 Unit
o
C/W
ELECTRICAL CHARACTERISTICS Tamb = 25C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10k, RGA = 600, RGV = 50, RLOUTV = 4.7k, unless otherwise specified.
Symbol AVCC VVCC VCC12 ICCA ICCV ICC12 Parameter Audio Operating Supply Voltage Video Operating Supply Voltage Slow Blanking Control Supply Voltage Audio Supply Current Video Supply Current (Iccv1 + Iccv2 + Iccv3) 12V Supply Current AVCC = 8V, no input signal VVCC = 8V, no input signal VCC12 = 12V SlBlk input mode SlBlk output mode, no load AVCC = 8V VVCC = 8V Test Conditions Min. 7.5 7.5 11.2 Typ. 8 8 12 10 65 Max. 8.5 8.5 12.8 15 80 Unit V V V mA mA A mA mA mA
ACTIVE (all channels ON)
0 2.0 1.2 9
2 3
STANDBY (all channels OFF) ICCAstd ICCVstd Audio Supply Current in stand by mode Video Supply Current in stand by mode (ICCV1 + ICCV2 + ICCV3)
5/22
STV6410A
ELECTRICAL CHARACTERISTICS (continued) Tamb = 25C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10k, RGA = 600, RGV = 50, RLOUTV = 4.7k, unless otherwise specified.
Symbol AUDIO SECTION SVR100 Supply Voltage Rejection VRIPPLE = 500mVRMS at f = 100Hz, Gain = 0dB, VREF filter cap = 47F VREF filter cap = 220F VRIPPLE = 500mVRMS at f = 1kHz, Gain = 0dB AVCC = 8V 45 -3dB, 0.5VRMS, RL = 10k, Gain = 0dB 0.5VRMS, 20Hz to 20kHz, Gain = 0dB 80 70 70 90 74 85 VCC/2 1 60 BW = 20Hz, 20kHz, Gain = 0dB 0.5VRMS, RL = 10k, Gain = 0dB -14dB to +6dB VIN = 0.5VRMS, 1kHz, Gain = 0dB VIN = 0.5VRMS, 1kHz, Gain = 0dB 1kHz, LPF @ 80kHz VIN = VOUT = 0.5VRMS VIN = VOUT = 2VRMS THD = 0.2%, 1kHz VIN = 1VRMS, THD = 0.3%, Gain = 0dB VIN = 0.5VRMS, on one input 2.1 2 90 -0.5 1.75 -0.5 -0.5 2 5 +0.5 2.25 0.5 0.5 15 50 0.5 Parameter Test Conditions Min. Typ. Max. Unit
60 70
72 82 80 VCC/2 2 55 1 10
dB dB dB V VRMS k % kHz dB dB dB dB V mV V dB dB dB dB
SVR1K VINDC VINAC RIN RINmatch Frange Flatness Cs
Supply Voltage Rejection Input DC Level Input signal amplitude Input Resistance Input resistance matching Bandwith Spread of gain in audio band
Channel Separation (from audio inputs) VIN = 0.5VRMS, f = 1kHz, on one input, RL =10k, Gain = 0dB Between L &R of TV outputs Channel Isolation from video inputs Output DC Level DC Offset change Output Resistance Equivalent Input Voltage Noise 0dB Gain Step of Gain Gain matching between different inputs on one output Gain matching between Left/Right outputs of one input channel Total Harmonic Distorsion VIN = 1 VPP, f = 15kHz, on one input, RL = 10k, Gain = 0dB AVCC = 8V Switching between inputs
Ci VOUT VOFF ROUT eNI G0 GSTEP GMATCH1 GMATCH2 THD
0.002 0.003 2.25 2.25
0.05
% % k dB
6410A-05.TBL
VCL RL Mute
Output clipping Level Output Load Resistance Mute Suppression
VRMS
6/22
STV6410A
ELECTRICAL CHARACTERISTICS (continued) Tamb = 25C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10k, RGA = 600, RGV = 50, RLOUTV = 4.7k, unless otherwise specified.
Symbol VIDEO SECTION VDCIN ICLAMP ILEAK CIN VIN DYN BW DC Input Level Clamping current Input Leakage Current Input Capacitance Max Input Signal Dynamic Output Signal Bandwidth at -3dB Y/CVBS RGB Y/C mixer (on RF out) Crosstalk Isolation between Channels Output Resistance Load Impedance Gain at RGB outputs Gain matching between R, G, B Step of Gain Gain on Y/CVBS channels Gain matching between Y, CVBS inputs DC Output Voltage RF Output Voltage Differential Phase Differential Gain Mute Suppression Output current VIN = 1VPP, gain set to 6dB VIN = 1VPP, gain set to 6dB 3dB to 6dB VIN = 1VPP VIN = 1VPP Bottom sync pulse Bottom sync pulse VIN = 1VPP, 4.43MHz VIN = 1VPP, 4.43MHz VIN = 1VPP at f = 5MHz, on one input VOUT DC @ +1V -55 1.5 2.5 1 5.5 -0.3 0.75 5.5 -0.5 1.1 1.5 VVCC = 8V VVCC = 8V VIN = 1VPP VIN = 1VPP VINY = 1VPP, VINC = muted VIN = 1VPP at f = 5MHz, on one input 1.5 3 15 15 10 50 Bottom Synch Pulse at VDCIN - 400mV VIN = VDCIN + 1V 1 2 2 1 2 2 4 18 18 15 60 50 4.7 6 0 1 6 0 1.3 1.8 0.7 0.4 6.5 0.3 1.25 6.5 0.5 10 V mA A pF VPP VPP MHz MHz MHz dB k dB dB dB dB dB V V % dB mA Parameter Test Conditions Min. Typ. Max. Unit
CT ROUT RLOAD GRGB GRGBM GRGBSTEP GYCVBS GYCVBSM DCOUT DCOUT RF DPHI DG Mute IVOUT
CHROMA SECTION VDCIN RIN CIN VIN Dyn DCOUT CBW CT ROUT GOUTC GCM Mute CtoYdel CtoYdel DC Input Level Input Resistance Input Capacitance Max Input Signal Dynamic Output Signal DC Output Voltage Chroma Bandwidth Crosstalk Isolation between Channel Output Resistance Gain at OUTC Gain matching between C inputs Mute Suppression Chroma to luma delay,source Y/C Chroma to luma delay,source Y/C VIN = 1VPP VIN = 1VPP VIN = 1VPP at f = 5MHz, on one input Pin other than RF_OUT 1, VPP @ 5MHz Pin RF_OUT 5.5 -0.5 55 4 4 20 20 CIN = 1VPP at - 3dB VIN = 1VPP at f = 5MHz, on one input 1.5 3 1.9 10 45 3 55 2 2 3.8 2.3 19 52 50 6 0 6.5 0.5 V k pF VPP V V MHz dB dB dB dB ns ns
6410A-06.TBL
7/22
STV6410A
ELECTRICAL CHARACTERISTICS (continued) Tamb = 25C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10k, RGA = 600, RGV = 50, RLOUTV = 4.7k, unless otherwise specified.
Symbol Parameter Test Conditions Min. Typ. Max. Unit SLOW BLANKING SECTION INPUT (Input mode VCC8 = 8V 5%) SLBlow SLBhigh IIN SLBLOW SLBMED SLBHIGH Input Low Level Threshold Input High Level Threshold Input current Output Low Level (int. TV) Output Med Level (ext. 16/9) Output High Level (ext. 4/3) 0 5 10 2.5 7.5 3.25 8.25 50 0.02 5.75 11 4 9 100 1.5 6.5 12 V V A V V V
OUTPUT (Output mode VCC12 = 12V 5%, VCC8 = 8V 5%, RLOAD > 10k)
FAST BLANKING SECTION INPUT (Input mode VCCV = 8V 5%) FBlow/high Input Low/High Level Threshold IIN FBLOW FBHIGH FBDEL Input current Output Low Level Output High Level Fast blanking to RGB delay IIN = 1.0mA IIN = 0.2mA IOUT = 1.0mA at 50% on digital RGB transients, at 2.7VON FB rise transient, at 1.5V on FB fall CLOAD = 10pF max CLOAD = 10pF max between 10% and 90% between 90% and 10% 0 3.6 4 30 OUTPUT (Output mode VCCV = 8V 5%, RLOAD > 1k) 0.7 0.3 4.4 V V V ns 0.4 0.7 2 0.9 10 V A
FBTRANS
Fast Blanking transitions at FB output Rise Time Fall Time
30 30
ns ns
ADDRESS SELECTION INPUT ADDsel_L ADDsel_H ILEAK Address selection low level Address selection high level Leakage Current 4 0 0.2 VCC (8V) 10 V
6410A-07.TBL
V A
8/22
STV6410A
ELECTRICAL CHARACTERISTICS (continued) Tamb = 25C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10k, RGA = 600, RGV = 50, RLOUTV = 4.7k, unless otherwise specified.
Symbol I C BUS CHARACTERISTICS SCL VIL VIH ILI fSCL tR tF Cl SDA VIL VIH ILI Cl tR tF VOL tF CL TIMING tLOW tHIGH tSU,DAT tHD,DAT tSU,STO tBUF tHD,STA tSU,STA Clock Low Period Clock High Period Data Set-up Time Data Hold Time Set-up Time from Clock High to Stop Start Set-up Time following a Stop Start Hold Time Start Set-up Time following Clock Low to High Transition 4.7 4 250 0 4 4.7 4 4.7 340 s s ns ns s s s
6410A-08.TBL
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
2
Low Level Input Voltage High Level Input Voltage Input Leakage Current Clock Frequency Input Rise Time Input Fall Time Input Capacitance Low Level Input Voltage High Level Input Voltage Input Leakage Current Input Capacitance Input Rise Time Input Fall Time Low level Output Voltage Output Fall Time Load Capacitance 1.5V to 3V 1.5V to 3V IOL = 3mA 3V to 1.5V VIN = 0 to 5.5V 1.5V to 3V 1.5V to 3V VIN = 0 to 5.5V
-0.3 3 -10 0 0
1.5 5.5 10 100 1 300 10
V V A kHz s ns pF V V A pF s ns V ns pF
-0.3 3 -10 0
1.5 5.5 10 10 1 300 0.4 250 400
s
9/22
STV6410A
I2C BUS SELECTION Data transfers follow the usual I2C format: after the start condition (S), a 7-bit slave address is sent, followed by an eighth bit which is a data direction bit (W). A 8-bit subadress is sent to select a register, followed by a 8-bit data word to put in it. The IC's I2C bus decoder permits the automatic incrementation mode in write mode.
String Format Write only mode (S : start condition, P : stop condition, A : acknowledge)
S SLAVE ADDRESS 0 A SUBADDRESS A DATA A P
Read only mode
S SLAVE ADDRESS 1 A DATA A P
Slave Address
Address Value A6 1 A5 0 A4 0 A3 1 A2 0 A1 1 A0 X
Auto Increment Mode
S SLAVE ADDRESS 0 A SUBADDRESS A DATA0 A DATA1 A ........ DATAN A P
I2C Bus Address Write Address : 1001 01X0 Read Address : 1001 01X1 Address Selection Pin Grounded : X = 0, write address = 94HEX, read address = 95HEX Address Selection Pin to Supply : X = 1, write address = 96HEX, read address = 97HEX Input Signals Summary (Write Mode)
Reg. Address (HEX) 00 01 02 03 DATA D7 DATA D6 DATA D5 DATA D4 0/6dBGain 0/6dBGain DATA D3 TV Mono Not used DATA D2 DATA D1 DATA D0
TV Audio Level Adjustment Cinch Audio Level Adjustment AUX Mono Not used VCR Mono TV chroma mute
TV Audio Outputs control Cinch Audio Outputs control VCR Audio Outputs control TV RF ouput control R/Csub AUX Clamp TV R/C ouput control R/Csub Encoder Clamp
AUX Audio Outputs control Y/CVBS & Chroma TV outputs control
04
TV RGB outputs control AUX Chroma Mute Not used
TV FB Output control
RGB Gain VCR Chroma Mute Slow Blanking VCR SCART TV Clamp disable Not used ASTB Clamp disable Not used
05 06 07 08
AUX Y/CVBS & Chroma Outputs control Not used Slow Blanking AUX SCART TV Output OFF Not used ENCOD Clamp disable Not used
VCR Y/CVBS & Chroma Outputs control Slow Blanking TV SCART VCR Clamp disable AUX Clamp disable
VCR AUX Output OFF Output OFF Not used Not used
RF Mod CINCH Output OFF Output OFF
Not used data must be put to "0"
10/22
STV6410A
I2C BUS SELECTION (continued) Input Signals (Write Mode) Data Byte
TV Audio Output
Register Address (HEX) 00 Data Description Audio Output selection Bits 3 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X Stereo or Mono Mode 6dB Extra Gain Level Adjustment 1 1 3 X X X X 0 1 X X X X X X X X X X X X 0 1 X X X X X X X X X X X X 0 1 X X X X X X X X X X 0 1 X X X X X X X X X X 0 1 X X X X 0 0 0 0 1 1 1 1 X X X X X X 0 0 1 1 0 0 1 1 X X X X X X 0 1 0 1 0 1 0 1 X X X X X X Muted AUX inputs selected VCR inputs selected ASTB inputs selected NOT ALLOWED Encoder inputs selected NOT ALLOWED NOT ALLOWED 0 = Stereo 1 = Mono 0 = 0dB 1 = +6dB 0dB Adjustment -14dB Adjustment (-2dB/step) Comments
Audio Cinch Output
Register Address (HEX) 01 Data Description Audio Output Selection Bits 3 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X 6dB Extra Gain Level Adjustment 1 3 X X 0 1 X X X X X X X X X X 0 1 X X X X X X X X X X 0 1 X X X X X X X X 0 1 X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 X X X X 0 0 1 1 0 0 1 1 X X X X 0 1 0 1 0 1 0 1 X X X X Muted AUX inputs selected VCR inputs selected ASTB inputs selected TV inputs selected Encoder input selected NOT ALLOWED NOT ALLOWED 0 = 0dB 1 = +6dB 0dB Adjustment -14dB Adjustment (-2dB/step) Comments
11/22
STV6410A
I2C BUS SELECTION (continued)
VCR And AUX Audio Outputs Selection
Register Address (HEX) 02 Data Description VCR Audio Output Selection Bits 3 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X AUX Audio Output Selection 3 X X X X X X X X 0 1 X X X X X X X X 0 1 X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 X X X X X X X X X X X X 0 0 1 1 0 0 1 1 X X X X X X X X X X X X 0 1 0 1 0 1 0 1 X X 0 0 0 0 1 1 1 1 X X X X X X X X X X X X 0 0 1 1 0 0 1 1 X X X X X X X X X X X X 0 1 0 1 0 1 0 1 X X X X X X X X X X X X Muted AUX inputs selected NOT ALLOWED ASTB inputs selected TV inputs selected Encoder inputs selected NOT ALLOWED NOT ALLOWED 0 = Stereo 1 = Mono Muted NOT ALLOWED VCR inputs selected ASTB inputs selected TV inputs selected Encoder inputs selected NOT ALLOWED NOT ALLOWED 0 = Stereo 1 = Mono Comments
12/22
STV6410A
I2C BUS SELECTION (continued)
TV Video Output
Register Address (HEX) 03 Data Description R/C TV Output Selection RF output : adder control and chroma subcarrier filter selection Bits 1 2 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X Y/CVBS output and chroma signal selection 3 X X X X X X X X Chroma switch muting 1 X X 04 ENCODER R/Csub Clamp AUX R/Csub Clamp RGB output Gain FB Output 1 1 2 2 X X X X X X X X X X RGB ouputs selection 2 0 0 1 1 X X X X X X X X X X X X X X 0 1 X X X X X X X X X X 0 1 0 1 X X X X X X 0 0 0 0 1 1 1 1 X X X X X X X X 0 0 1 1 X X X X X X X X X X 0 0 1 1 0 0 1 1 X X X X X X X X 0 1 0 1 X X X X X X X X X X 0 1 0 1 0 1 0 1 X X X X X X 0 1 X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X 0 1 X X X X X X X X X X 0 1 X X X X X X X X X X X X X X 0 1 X X X X X X X X X X 0 1 X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X Comments Red signal selected Chroma signal selected CVBS to RF output Y+C to RF output Filter not active Filter active Y/CVBS & chroma muted Y/CVBS_AUX & R/C_AUX Y_AUX & R/C_AUX Y/CVBS _VCR & C_VCR CVBS_ASTB & Chr. muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC NOT ALLOWED Chroma Output controlled by d5-d4-d3 from register 03. Chroma Output forced to mute. Bottom Level Clamp Average Level Clamp Bottom Level Clamp Average Level Clamp +6dB gain +3dB gain (1dB/Step) FB forced to low level FB forced to high level FB from Encoder FB from AUX Muted RGB_Encoder selected RGB_AUX selected NOT ALLOWED
13/22
STV6410A
I2C BUS SELECTION (continued)
VCR And AUX Video Outputs
Register Address (HEX) 05 Data Description VCR Y/CVBS & Chroma Outputs Selection Bits 3 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X VCR Chroma Output Muting AUX Video Output Selection 1 X X 3 X X X X X X X X AUX Chroma Output Muting 1 0 1 X X X X X X X X X X 0 0 0 0 1 1 1 1 X X X X X X X X X X X X 0 0 1 1 0 0 1 1 X X X X X X X X X X X X 0 1 0 1 0 1 0 1 X X X X X X X X X X 0 1 X X X X X X X X X X 0 0 0 0 1 1 1 1 X X X X X X X X X X X X 0 0 1 1 0 0 1 1 X X X X X X X X X X X X 0 1 0 1 0 1 0 1 X X X X X X X X X X X X Comments Y/CVBS & chroma muted Y/CVBS_AUX & R/C_AUX Y_AUX & R/C_AUX NOT ALLOWED CVBS_ASTB & Chr. muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_TV & C_TV Chroma Output controlled by d2d1-d0 from register 05. Chroma Output forced to mute. Y/CVBS & chroma muted NOT ALLOWED NOT ALLOWED Y/CVBS_VCR & C_VCR CVBS_ASTB & Chr. muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS _TV & C_TV Chroma Output controlled by d6d5-d4 from register 05. Chroma Output forced to mute.
Slow Blanking Switches
Register Address (HEX) 06 Data Description Slow Blanking TV SCART Bits 2 d7 d6 d5 d4 d3 d2 d1 d0 X X X X Slow Blanking VCR SCART 2 X X X X Slow Blanking AUX SCART 2 X X X X X X X X X X X X X X X X X X X X X X X X 0 0 1 1 X X X X X X X X 0 1 0 1 X X X X 0 0 1 1 X X X X X X X X 0 1 0 1 X X X X 0 0 1 1 X X X X X X X X 0 1 0 1 X X X X X X X X Comments Input mode Output < 2V Output 16/9 format Output 4/3 format Input mode Output < 2V Output 16/9 format Output 4/3 format Input mode Output < 2V Output 16/9 format Output 4/3 format
14/22
STV6410A
I2C BUS SELECTION (continued)
Standby Modes Selection
Register Address (HEX) 07 Data Description AUX Clamps Disabling VCR Clamps Disabling ASTB Clamps Disabling TV Clamps Disabling Encoder Clamps Disabling TV/RGB Output Disabling AUX Output Disabling VCR Output Disabling 08 CINCH Output Disabling RF MOD Output Disabling Bits 1 1 1 1 1 1 1 1 1 1 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X X X 0 1 X X X X X X X X X X X X X X 0 1 0 1 X X X X X X X X X X X X X X 0 1 X X Comments Clamp Active Clamp Disabled Clamp Active Clamp Disabled Clamp Active Clamp Disabled Clamp Active Clamp Disabled Clamp Active Clamp Disabled Audio & Video Outputs ON Audio & Video Outputs OFF Audio & Video Outputs ON Audio & Video Outputs OFF Audio & Video Outputs ON Audio & Video Outputs OFF CINCH Output ON CINCH Output OFF RF MOD Output ON RF MOD Output OFF
Output Signals (Read Mode) Data Byte
Register Address (HEX) Data Description Slow Blanking TV SCART Bits 2 d7 d6 d5 d4 d3 d2 d1 d0 X X X Slow Blanking VCR SCART 2 X X X Slow Blanking AUX SCART 2 X X X X X X X X X X X X X X X X X X 0 1 1 X X X X X X 1 0 1 X X X 0 1 1 X X X X X X 1 0 1 X X X 0 1 1 X X X X X X 1 0 1 X X X X X X Comments Input < 2V Input 16/9 format Input 4/3 format Input < 2V Input 16/9 format Input 4/3 format Input < 2V Input 16/9 format Input 4/3 format
15/22
STV6410A
I2C BUS SELECTION (continued) Power-on Reset - Bus Register Initial Conditions Power on reset is active when the power supply voltage is below (Tbf) volts. Not significant bits (X) are preset to "0"
Register DATA Address d7 d6 d5 d4 d3 d2 d1 d0 HEX 00 01 02 03 04 05 06 07 08 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMMENTS Audio TV Output Muted,Stereo Mode,0dB Gain, 0dB Gain Adjustment. Audio Cinch Output Muted,0 dB Gain, 0dB Gain Adjustment. Audio VCR Output Muted,Audio AUX Output Muted. Red signal selected on R/C_TV output, CVBS to RF ouput,TV video and chroma switches muted, Chroma ouput controlled by d5-d4-d3 from register 03. Encoder R/Csub Bottom Level Clamp,AUX R/Csub Bottom Level Clamp, RGB Outputs 6dB Gain, FB Output forced to 0V, RGB outputs muted. VCR Video and chroma switches Muted, VCR Chroma Output controlled by d2-d1-d0 from register 05,AUX Video and chroma switches Muted, AUX Chroma Output controlled by d6-d5-d4 from register 05. TV SCART Slow Blanking Input Mode,VCR SCART Slow Blanking Input Mode, AUX SCART Slow Blanking Input Mode. AUX, VCR, ASTB, TV, ENCODER Clamps Active ; TV/RGB, AUX, VCR Outputs ON. Cinch, RF Mod Outputs ON.
16/22
STV6410A
INPUT/OUTPUT GROUPS Figure 1 : Bottom Clamped Video Inputs (Pins 24, 26, 30, 32 ,34, 36, 38, 44, 46, 50, 52)
VCC 8V VCC 8V 2V + VD
VCC 8V IB 25kW 25kW 3V
Figure 2 : Average Clamped Video Inputs (Pins 40, 48, 54)
VCC 8V
15kW
tri
6410A-03.EPS 6410A-04.EPS
tri Protected Pad
Protected Pad
Figure 3 : Audio Inputs (5 Stereo) (Pins 35-37, 39-41, 47-49, 53-56)
VCC 8V 50kW VCC/2
Figure 4 : Audio Outputs (4 Stereo +1) (Pins 58, 59, 60-62, 4-6, 8)
VCC 8V
60W
IB
6410A-05.EPS 6410A-06.EPS 6410A-08.EPS
Protected Pad
Protected Pad
Figure 5 : Trap Filter (Pin 11)
Figure 6 : Video Outputs (Pins 61, 63, 1, 3, 5, 7, 9, 13,15)
VCC 8V VCC 8V
VCC 8V
VCC 8V
50W
1kW 100W
5kW
Protected Pad
6410A-07.EPS
5kW
Protected Pad
17/22
STV6410A
INPUT/OUTPUT GROUPS (continued) Figure 7 : VREF External Capacitor (Pin 51) Figure 8 : Slow Blanking (Pins 25, 27, 31)
VCC 12V
VCC 8V
VCC 8V
1kW 25kW VCC 12V
40kW IB
IB 40kW Protected Pad
6410A-09.EPS
80kW
Protected Pad
Figure 9 : Input Fast Blanking (Pins 18, 19)
Figure 10 : Output Fast Blanking (Pin 17))
1kW
VCC 8V
VCC 8V
50W
25kW
6410A-11.EPS 6410A-12.EPS 6410A-14.EPS
Protected Pad
Protected Pad
Figure 11 : I2C Bus (Add) (Pin 20)
VCC 8V
Figure 12 : I2C Bus (SCL) (Pin 21)
VCC 8V
10kW
10kW
Protected Pad
6410A-13.EPS
Protected Pad
18/22
6410A-10.EPS
80kW
STV6410A
INPUT/OUTPUT GROUPS (continued) Figure 13 : I2C Bus (SDA) (Pin 22)
VCC 8V Acknowledge 10kW
Protected Pad
APPLICATION DIAGRAM
AUDIO L AUDIO R R R/C C G B FAST BLANK CVBS/Y AUDIO L AUDIO R CVBS/Y AUDIO L AUDIO R SLOW BLANK CVBS AUDIO L+R CVBS/Y C AUDIO L AUDIO R CVBS/Y C AUDIO L AUDIO R SLOW BLANK R/C G B FAST BLANK CVBS/Y C AUDIO L AUDIO R Y CVBS AUDIO L AUDIO R R/C G B FAST BLANK CVBS/Y AUDIO L AUDIO R Y CVBS/Y C AUDIO L AUDIO R SLOW BLANK CINCH OUTPUT
STV6410A
R, G, B, FB SWITCHES
ENCODER
SCART1 TV
CVBS/Y SWITCHES
ANALOG STB
RF MOD
CHROMA SWITCHES
AUDIO SWITCHES
SCART3 VCR
SLOW BLANK, I/O CONTROL
SCART2 AUX
19/22
6410A-16.EPS
6410A-15.EPS
STV6410A
APPLICATION NOTE 1 - Audio Part 1.a - Inputs The audio inputs are designed to follow sources up to (at least) 2VRMS (that is around 6VPP) with an expected DC level of VCC/2 (4V typ.). That's why the device is providing this DC polarization. That means that in most of the cases the inputs are AC coupled via chemical capacitors. The recommended values are 1F, 2.2F or 4.7F (internal polar. is made via a 50k resistor). I want to point out that the internal polarization is filtered by an external capacitor (on Pin called `VREF'). This capacitor contribute to good performance of the device. Its value should be 47F or more (coupled with an 47nF HF cap. for internal video references). Figure 14 : Audio Inputs
220W L/R Audio 12kW 4.7m F Audio In
220W
6410A-17.EPS
2 - Video Part 2.a - Inputs Video inputs need to be AC coupled. But only some small capacitor values are requested thanks to the internal clamps provided by these devices. Usually some 100nF HF capacitors (47nF to 220nF) are enough to provide good performances on Y, CVBS,RGB and C inputs. Chrominance inputs : - average clamp - that means that the DC is measured as the average value of the input signal and set to an internal reference (close to 3V). The dynamic allowed is more than 1.5V. RGB, Y, CVBS inputs : - bottom sync top clamp that means that the DC level is measured at the lowest value of the input signal and set to an internal reference (close to 2V). The dynamic allowed is more than 1.5V. Figure 16 : Video Inputs
100nF Video In
6410A-19.EPS 6410A-20.EPS
Y/C/CVBS/RGB 75W
STV6410A
NB: In some particular cases (loopback from outputs to inputs) the AC coupling capacitor can be removed... but some small offsets in the audio chain can cause some noise while switching from one input to another. 1.b - Outputs Audio output buffers are able to provide more than 2.1VRMS (around 6VPP) on a typical load of 10k (in fact a 2k load is acceptable). The DC level is once more VCC/2 for best dynamic performance. Usually some AC coupling capacitors are used at the outputs. To drive some typical 10k loads, it is normal to use capacitors with value 5 to 10 times the value of the input capacitors. That gives a value between 4.7F and 47F. Moreover it can be a good idea to insert resistors (220 or 470) in the audio outputs. That will provide a protection for output stages. No external drivers or buffers are needed in typical use of the device. Figure 15 : Audio Outputs
4.7m F Audio Out 470W L/R Audio
STV6410A
2.b - Outputs On these devices the video outputs are NOT ABLE to drive 150. That means that external buffers (one simple NPN-Transistor per output) are needed. To reduce the external components, the output DC level have been chosen to allow a direct drive of the base of the output follower (NPN). The emitters of the NPNs will be polarized to ground via 1k resistors (more or less) and will drive the outputs through some 75 resistors. Do not forget to bufferize your favourite UHF modulator video input... Chrominance outputs have a DC of 2.3V (it is an average value) and Luminance type output have a DC of 1.3V (it is a bottom value). Figure 17 : Video (and Fast Blanking) Outputs
Video Out 75W Video
6410A-18.EPS
(4.7kW )
1kW
STV6410A
STV6410A
20/22
STV6410A
APPLICATION NOTE (continued) 2.c - Fast Blanking Fast Blanking signal is used to make an equipment consider its RGB inputs for full-screen display or fast insertion (OSD, etc.). The output of such signal is exactly managed in the same way as RGB (that is important for levels and delays). The input is DC coupled (insert a few hundreds ohms resistors for external input). 2.d - Slow Blanking Slow Blanking signal is used to make an equipment consider an external input (e.g. CVBS and SOUND). The input/output of such signal is very simple, DC coupled (insert a few hundreds ohms resistors for external I/O). Notice that this function is requesting a 12V power supply (on Pin VCC12). This pin can be left open (not pulled down) if this function is not used. 3 - I2C Bus 3.a - Address You can choose the address of the device by setting the Pin ADD to ground or to VDD. The former selects 94h and the latter selects 96h. These values correspond to the writeable (or control) registers. Change the lowest bits to `1' (that gives 95h and 97h) to read the readable register of the device. One device will answer (acknowledge) to its both addresses 94h and 95h or 96h and 97h. 3.b - Write Mode This mode is used to control the device, to select switches positions, gains, etc. Send a start condition, the address of the device, the address of the register (its number), and the data to put in it. At this point you can send a stop or send the data of the following registers (that is what we call auto-increment). 3.c - Read Mode This mode is used to read some data such as slow-blanking input signals. Send a start condition, the address of the device (+1) and then send one byte clock to read the unique data register.
N.B.: Do not forget your favourite ESD protections for I/O signals of plugs.
21/22
STV6410A
PACKAGE MECHANICAL DATA 64 PINS - FULL PLASTIC QUAD FLAT PACK (TQFP)
A A2 64 e A1 49 0,10 mm .004 inch SEATING PLANE
1
48
16
33
E3 E1 E
17
D3 D1 D
32
L1
L
K
Dimensions A A1 A2 B C D D1 D3 e E E1 E3 L L1 K
Min. 0.05 1.35 0.17 0.09
Millimeters Typ.
1.40 0.22 12.00 10.00 7.50 0.50 12.00 10.00 7.50 0.60 1.00
Max. 1.60 0.15 1.45 0.27 0.20
Min. 0.002 0.053 0.007 0.004
Inches Typ.
0.055 0.009 0.472 0.394 0.295 0.0197 0.472 0.394 0.295 0.024 0.039
Max. 0.063 0.006 0.057 0.011 0.008
1 0.75 0.018
0.45
0.030
5W.TBL
0o (Min.), 7o (Max.)
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - All Rights Reserved Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com
22/22
PM-5W.EPS
0,25 mm .010 inch GAGE PLANE
B
c

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